SI3500-A-GM【PDF 15/18 页】IC POE SWITCH PWR OVER LAN 20QFN

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Sheet目录46

11页 12页 13页 14页 [15页]16页 17页 18页

Si3500

Rev. 1.1

Table 10. PCB Land Pattern Dimensions

Symbol

Min

Nom

Max

2.70

2.75

2.80

2.70

2.75

2.80

0.25

0.30

0.35

0.90

0.95

1.00

4.70

0.80

General:

1. All dimensions shown are in millimeters (mm) unless otherwise noted.

2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.

3. This Land Pattern Design is based on the IPC-7351 guidelines.

Solder Mask Design:

4. All metal pads are to be non-solder mask defined (NSMD). Clearance between the

solder mask and the metal pad is to be 60 m minimum, all the way around the pad.

Stencil Design:

5. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be

used to assure good solder paste release.

6. The stencil thickness should be 0.125mm (5 mils).

7. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pins.

8. A 2x2 array of 1.2 mm square openings on 1.4 mm pitch should be used for the center

ground pad.

Card Assembly:

9. A No-Clean, Type-3 solder paste is recommended.

10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020C specification

for Small Body Components.

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